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PIC32MX3XX/4XX
6.0
RESETS
The Reset module combines all Reset sources and
controls the device Master Reset signal, SYSRST. The
Note 1: This data sheet summarizes the features
following is a list of device Reset sources:
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer to Section 7. “Resets” (DS61118)
?
?
?
?
POR: Power-on Reset
MCLR: Master Clear Reset Pin
SWR: Software Reset
WDTR: Watchdog Timer Reset
of the “PIC32MX Family Reference Man-
ual” , which is available from the Microchip
web site (www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be avail-
“Memory Organization” in this data
sheet for device-specific register and bit
information.
? BOR: Brown-out Reset
? CMR: Configuration Mismatch Reset
A simplified block diagram of the Reset module is
FIGURE 6-1:
MCLR
SYSTEM RESET BLOCK DIAGRAM
Sleep or Idle
Glitch Filter
MCLR
WDTR
Voltage
Regulator
WDT
Time-out
Enabled
Power-up
Timer
POR
SYSRST
V DD
V DD Rise
Detect
Configuration
Mismatch
Reset
Software Reset
? 2010 Microchip Technology Inc.
Brown-out
Reset
BOR
CMR
SWR
DS61143G-page 87
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